By John M. Cohn, David J. Garrod, Visit Amazon's Rob A. Rutenbar Page, search results, Learn about Author Central, Rob A. Rutenbar, , L. Richard Carley
This ebook provides an in depth precis of study on computerized format of device-level analog circuits that was once undertaken within the overdue Eighties and early Nineties at Carnegie Mellon college. We concentrate on the paintings in the back of the production of the instruments known as KOAN and ANAGRAM II, which shape a part of the middle of the CMU ACACIA analog CAD approach. KOAN is a tool placer for customized analog cells; ANANGRAM II an in depth region router for those analog cells. we try to provide the motivations at the back of the structure of those instruments, together with particular dialogue of the sophisticated expertise and circuit issues that needs to be addressed in any profitable analog or mixed-signal structure device. Our procedure in organizing the chapters of the ebook has been to give our algo rithms as a sequence of responses to those very actual and intensely tricky analog structure difficulties. eventually, we current a number of examples of effects generated by means of our algorithms. This learn used to be supported partially by way of the Semiconductor learn Corpora tion, via the nationwide technology beginning, by means of Harris Semiconductor, and through the overseas enterprise Machines company Resident examine software. eventually, only for the list: John Cohn was once the dressmaker of the KOAN placer; David Garrod used to be the dressmaker of the ANAGRAM II router (and its predeces sor, ANAGRAM I). This booklet was once architected through all 4 authors, edited by way of John Cohn and Rob Rutenbar, and produced in comprehensive shape through John Cohn.
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Extra resources for Analog Device-Level Layout Automation
The library currently consists of only three basic generators, one for folded MOS devices, one for non-precision capacitors, and one for non-precision resistors. 4. 4(a) shows a simple differential pair similar to one created by one of ILAC's module generators. 4(b) illustrates how this same structure can be formed by merging two individual transistors using our model of device geometry sharing. As the placement evolves, we must differentiate between the legal overlaps by which adjacent devices can share geometry and the illegal overlaps such as design-rule spacing errors.
4 Examples of (a) module generated differential pair (b) similar differential pair created by merging of two devices by KOAN. easier for the placer to choose the device geometry sharing configurations which reduce critical parasitic capacitances, decreases total net-length, and increases the packing density of the layout. Also, since device and sub-circuit generators are tedious to construct and maintain, the reduction in the number of required generators substantially decreases the effort required to support a new technology.
We conclude 18 CHAPTER 1 with a detailed demonstration of the impact of crosstalk avoidance routing on a symmetric comparator circuit. Chapter 9 describes the implementation of these ideas in the KOAN / AN AG RAM II layout system. We also use the chapter as an opportunity to show additional KOAN and ANAGRAM II layout results with some comparisons to manual layout. We conclude the chapter with a description of an incremental re-spacing capability, which improves the overall robustness of the KOAN / AN AG RAM II system.